An FPGA (Field Programmable Gate Array) is known as a programmable device in which circuits can be reconfigured. As one technology that implements different parts of a logic circuit in an FPGA, Japanese Laid-Open Patent Publication No. 2000-40745 discloses a technology for dividing an initial net list that defines the logic circuit into many pages and implements a circuit for one of such pages in the FPGA. By doing so, this technology aims to make it possible to implement a much larger circuit than the physical capacity of the FPGA. Japanese Laid-Open Patent Publication No. 2003-518666 discloses a technology that divides a design net list into sets of static macros and sets of reconfigurable macro contexts, compiles the respective reconfigurable contexts, and carries out placing and routing for the initial device contexts.